/**
 *******************************************************************************
 * @file  hc32f160_tmrb.h
 * @brief This file contains all the functions prototypes of the TimerB driver
 *        library.
 @verbatim
   Change Logs:
   Date             Author          Notes
   2020-11-27       CDT             First version
 @endverbatim
 *******************************************************************************
 * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
 *
 * This software component is licensed by HDSC under BSD 3-Clause license
 * (the "License"); You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 *                    opensource.org/licenses/BSD-3-Clause
 *
 *******************************************************************************
 */
#ifndef __HC32F160_TMRB_H__
#define __HC32F160_TMRB_H__

/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif

/*******************************************************************************
 * Include files
 ******************************************************************************/
#include "hc32_common.h"
#include "ddl_config.h"

/**
 * @addtogroup HC32F160_DDL_Driver
 * @{
 */

/**
 * @addtogroup DDL_TMRB
 * @{
 */

#if (DDL_TMRB_ENABLE == DDL_ON)

/*******************************************************************************
 * Global type definitions ('typedef')
 ******************************************************************************/
/**
 * @defgroup TMRB_Global_Types TMRB Global Types
 * @{
 */

/**
 * @brief TMRB initialization structure definition
 */
typedef struct
{
    uint16_t u16ClockDiv;       /*!< TMRB Count clock division select.
                                     This parameter can be a value of @ref TMRB_Clock_Division */
    uint16_t u16CountMode;      /*!< TMRB count mode.
                                     This parameter can be a value of @ref TMRB_Count_Mode */
    uint16_t u16CountDir;       /*!< TMRB count direction.
                                     This parameter can be a value of @ref TMRB_Count_Direction */
    uint16_t u16PeriodValue;    /*!< TMRB period value.
                                     This parameter can be a value of half-word */
} stc_tmrb_init_t;

/**
 * @brief TMRB PWM initialization structure definition
 */
typedef struct
{
    uint16_t u16CompareValue;   /*!< TMRB compare value.
                                     This parameter can be a value of half-word */
    uint16_t u16StartPolarity;  /*!< TIMB_<t>_PWM1(t=1~8) output polarity when start count.
                                     This parameter can be a value of @ref TMRB_PWM_Polarity */
    uint16_t u16StopPolarity;   /*!< TIMB_<t>_PWM1(t=1~8) output polarity when stop count
                                     This parameter can be a value of @ref TMRB_PWM_Polarity */
    uint16_t u16MatchPolarity;  /*!< TIMB_<t>_PWM1(t=1~8) output polarity when compare value match
                                     This parameter can be a value of @ref TMRB_PWM_Polarity */
    uint16_t u16PeriodPolarity; /*!< TIMB_<t>_PWM1(t=1~8) output polarity when period value match
                                     This parameter can be a value of @ref TMRB_PWM_Polarity */
} stc_tmrb_pwm_init_t;

/**
 * @}
 */

/*******************************************************************************
 * Global pre-processor symbols/macros ('#define')
 ******************************************************************************/
/**
 * @defgroup TMRB_Global_Macros TMRB Global Macros
 * @{
 */

/**
 * @defgroup TMRB_Function_Mode TMRB Function Mode
 * @{
 */
#define TMRB_FUNC_CMP                       (0x0000U)           /*!< Output comare function */
#define TMRB_FUNC_CAPT                      (TMRB_CCONR_CAPMD)  /*!< Input capture function */
/**
 * @}
 */

/**
 * @defgroup TMRB_Flag TMRB Flag
 * @{
 */
#define TMRB_FLAG_OVF                       (TMRB_BCSTR_OVFF)
#define TMRB_FLAG_UDF                       (TMRB_BCSTR_UDFF)
#define TMRB_FLAG_CMP                       (TMRB_STFLR_CMPF1)
#define TMRB_FLAG_ALL                       (TMRB_FLAG_OVF  |                  \
                                             TMRB_FLAG_UDF  |                  \
                                             TMRB_FLAG_CMP)
/**
 * @}
 */

/**
 * @defgroup TMRB_Interrupt_definition TMRB Interrupts Definition
 * @{
 */
#define TMRB_INT_OVF                        (TMRB_BCSTR_ITENOVF)
#define TMRB_INT_UDF                        (TMRB_BCSTR_ITENUDF)
#define TMRB_INT_CMP                        (TMRB_ICONR_ITEN1)
#define TMRB_INT_ALL                        (TMRB_INT_OVF  |                   \
                                             TMRB_INT_UDF  |                   \
                                             TMRB_INT_CMP)
/**
 * @}
 */

/**
 * @defgroup TMRB_Event TMRB Event
 * @{
 */
#define TMRB_EVT_CMP                        (TMRB_ECONR_ETEN1)
#define TMRB_EVT_ALL                        (TMRB_EVT_CMP)
/**
 * @}
 */

/**
 * @defgroup TMRB_Count_Mode TMRB Count Mode
 * @{
 */
#define TMRB_MD_SAWTOOTH                    (0x0000U)
#define TMRB_MD_TRIANGLE                    (TMRB_BCSTR_MODE)
/**
 * @}
 */

/**
 * @defgroup TMRB_Count_Direction TMRB Count Direction
 * @{
 */
#define TMRB_DIR_DOWN                       (0x0000U)
#define TMRB_DIR_UP                         (TMRB_BCSTR_DIR)
/**
 * @}
 */

/**
 * @defgroup TMRB_Clock_Division TMRB Clock Division
 * @{
 */
#define TMRB_CLK_DIV1                       (0U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK      */
#define TMRB_CLK_DIV2                       (1U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/2    */
#define TMRB_CLK_DIV4                       (2U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/4    */
#define TMRB_CLK_DIV8                       (3U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/8    */
#define TMRB_CLK_DIV16                      (4U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/16   */
#define TMRB_CLK_DIV32                      (5U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/32   */
#define TMRB_CLK_DIV64                      (6U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/64   */
#define TMRB_CLK_DIV128                     (7U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/128  */
#define TMRB_CLK_DIV256                     (8U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/256  */
#define TMRB_CLK_DIV512                     (9U << TMRB_BCSTR_CKDIV_POS)    /*!< HCLK/512  */
#define TMRB_CLK_DIV1024                    (10U << TMRB_BCSTR_CKDIV_POS)   /*!< HCLK/1024 */
/**
 * @}
 */

/**
 * @defgroup TMRB_Hardware_Start_Count_Condition TMRB Hardware Start Count Condition
 * @note when sync start function is valid, only TIMB_<n>_PWM1(n=1/3/5/7) is valid.
 * @note when sync start function is invalid, TIMB_<t>_PWM1(t=1~8) is valid.
 * @{
 */
#define TMRB_START_COND_PWMR                (TMRB_HCONR_HSTA0)  /*!< Start count when detect the rising edge on TIMB_<t>_PWM1 */
#define TMRB_START_COND_PWMF                (TMRB_HCONR_HSTA1)  /*!< Start count when detect the falling edge on TIMB_<t>_PWM1 */
#define TMRB_START_COND_EVT                 (TMRB_HCONR_HSTA2)  /*!< Start count when detect the timer TMRB_HTSSR specified event */
#define TMRB_START_COND_ALL                 (TMRB_START_COND_PWMR |            \
                                             TMRB_START_COND_PWMF |            \
                                             TMRB_START_COND_EVT)
/**
 * @}
 */

/**
 * @defgroup TMRB_Hardware_Stop_Count_Condition TMRB Hardware Stop Count Condition
 * @{
 */
#define TMRB_STOP_COND_PWMR                 (TMRB_HCONR_HSTP0)  /*!< Stop count when detect the rising edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_STOP_COND_PWMF                 (TMRB_HCONR_HSTP1)  /*!< Stop count when detect the falling edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_STOP_COND_EVT                  (TMRB_HCONR_HSTP2)  /*!< Stop count when detect the timer TMRB_HTSSR specified event */
#define TMRB_STOP_COND_ALL                  (TMRB_START_COND_PWMR |            \
                                             TMRB_START_COND_PWMF |            \
                                             TMRB_START_COND_EVT)
/**
 * @}
 */

/**
 * @defgroup TMRB_Hardware_Clear_Count_Condition TMRB Hardware Clear Count Condition
 * @{
 */
#define TMRB_CLR_COND_PWMR                  (TMRB_HCONR_HCLE0)  /*!< Clear count value when detect the rising edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CLR_COND_PWMF                  (TMRB_HCONR_HCLE1)  /*!< Clear count value when detect the falling edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CLR_COND_EVT                   (TMRB_HCONR_HCLE2)  /*!< Clear count value when detect the timer TMRB_HTSSR specified event */
#define TMRB_CLR_COND_SYM_PWMR              (TMRB_HCONR_HCLE3)  /*!< Clear count value when detect the rising edge on TIMB_<n>_PWM1, _<n>_=2/4/6/8 when current unit m=1/3/5/7 or n=1/3/5/7 when current unit m=2/4/6/8 */
#define TMRB_CLR_COND_SYM_PWMF              (TMRB_HCONR_HCLE4)  /*!< Clear count value when detect the falling edge on TIMB_<n>_PWM1, _<n>_=2/4/6/8 when current unit m=1/3/5/7 or n=1/3/5/7 when current unit m=2/4/6/8 */
#define TMRB_CLR_COND_ALL                   (TMRB_CLR_COND_PWMR     |          \
                                             TMRB_CLR_COND_PWMF     |          \
                                             TMRB_CLR_COND_SYM_PWMR |          \
                                             TMRB_CLR_COND_SYM_PWMF |          \
                                             TMRB_CLR_COND_EVT)
/**
 * @}
 */

/**
 * @defgroup TMRB_Hardware_Count_Up_Condition TMRB Hardware Count Up Condition
 * @{
 */
#define TMRB_CNT_UP_COND_PWMR               (TMRB_HCUPR_HCUP8)  /*!< Count up when detect the rising edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CNT_UP_COND_PWMF               (TMRB_HCUPR_HCUP9)  /*!< Count up when detect the falling edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CNT_UP_COND_EVT                (TMRB_HCUPR_HCUP10) /*!< Count up value when detect the timer TMRB_HTSSR specified event */
#define TMRB_CNT_UP_COND_SYM_OVF            (TMRB_HCUPR_HCUP11) /*!< Count up by overflow of TIMB_<n>, _<n>_=2/4/6/8 when current unit m=1/3/5/7 or n=1/3/5/7 when current unit m=2/4/6/8 */
#define TMRB_CNT_UP_COND_SYM_UDF            (TMRB_HCUPR_HCUP12) /*!< Count up by underflow of TIMB_<n>, _<n>_=2/4/6/8 when current unit m=1/3/5/7 or n=1/3/5/7 when current unit m=2/4/6/8 */
#define TMRB_CNT_UP_COND_ALL                (TMRB_CNT_UP_COND_PWMR    |        \
                                             TMRB_CNT_UP_COND_PWMF    |        \
                                             TMRB_CNT_UP_COND_EVT     |        \
                                             TMRB_CNT_UP_COND_SYM_OVF |        \
                                             TMRB_CNT_UP_COND_SYM_UDF)
/**
 * @}
 */

/**
 * @defgroup TMRB_Hardware_Count_Down_Condition TMRB Hardware Count Down Condition
 * @{
 */
#define TMRB_CNT_DOWN_COND_PWMR             (TMRB_HCDOR_HCDO8)  /*!< Count down when detect the rising edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CNT_DOWN_COND_PWMF             (TMRB_HCDOR_HCDO9)  /*!< Count down when detect the falling edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CNT_DOWN_COND_EVT              (TMRB_HCDOR_HCDO10) /*!< Count down value when detect the timer TMRB_HTSSR specified event */
#define TMRB_CNT_DOWN_COND_SYM_OVF          (TMRB_HCUPR_HCUP11) /*!< Count down by overflow of TIMB_<n>, _<n>_=2/4/6/8 when current unit m=1/3/5/7 or n=1/3/5/7 when current unit m=2/4/6/8 */
#define TMRB_CNT_DOWN_COND_SYM_UDF          (TMRB_HCUPR_HCUP12) /*!< Count down by underflow of TIMB_<n>, _<n>_=2/4/6/8 when current unit m=1/3/5/7 or n=1/3/5/7 when current unit m=2/4/6/8 */
#define TMRB_CNT_DOWN_COND_ALL              (TMRB_CNT_DOWN_COND_PWMR    |      \
                                             TMRB_CNT_DOWN_COND_PWMF    |      \
                                             TMRB_CNT_DOWN_COND_EVT     |      \
                                             TMRB_CNT_DOWN_COND_SYM_OVF |      \
                                             TMRB_CNT_DOWN_COND_SYM_UDF)
/**
 * @}
 */

/**
 * @defgroup TMRB_Hardware_Input_Capture_Condition TMRB Hardware Input Capture Condition
 * @{
 */
#define TMRB_CAPT_COND_PWMR                 (TMRB_CCONR_HICP0)  /*!< Trigger capture when detect the rising edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CAPT_COND_PWMF                 (TMRB_CCONR_HICP1)  /*!< Trigger capture when detect the falling edge on TIMB_<t>_PWM1(t=1~8) */
#define TMRB_CAPT_COND_EVT                  (TMRB_CCONR_HICP2)  /*!< Trigger capture when detect the timer TMRB_HTSSR specified event */
#define TMRB_CAPT_COND_ALL                  (TMRB_CAPT_COND_PWMR |            \
                                             TMRB_CAPT_COND_PWMF |            \
                                             TMRB_CAPT_COND_EVT)
/**
 * @}
 */

/**
 * @defgroup TMRB_Input_Capture_Noise_Filter_Clock_Division TMRB Input Capture Noise Filter Clock Division
 * @{
 */
#define TMRB_FILTER_CLK_DIV1                (0U)                    /*!< HCLK          */
#define TMRB_FILTER_CLK_DIV4                (TMRB_CCONR_NOFICKCP_0) /*!< HCLK/4        */
#define TMRB_FILTER_CLK_DIV16               (TMRB_CCONR_NOFICKCP_1) /*!< HCLK/16       */
#define TMRB_FILTER_CLK_DIV64               (TMRB_CCONR_NOFIENCP)   /*!< HCLK/64       */
/**
 * @}
 */

/**
 * @defgroup TMRB_PWM_Count_State TMRB PWM Count State
 * @{
 */
#define TMRB_PWM_CNT_START                  (TMRB_PCONR_STAC_POS)
#define TMRB_PWM_CNT_STOP                   (TMRB_PCONR_STPC_POS)
#define TMRB_PWM_CNT_MATCH                  (TMRB_PCONR_CMPC_POS)
#define TMRB_PWM_CNT_PERIOD                 (TMRB_PCONR_PERC_POS)
/**
 * @}
 */

/**
 * @defgroup TMRB_PWM_Polarity TMRB PWM Polarity
 * @{
 */
#define TMRB_PWM_LOW                        (0U)    /*!< TIM_<t>_PWM1(t=1~8) output low level */
#define TMRB_PWM_HIGH                       (1U)    /*!< TIM_<t>_PWM1(t=1~8) output high level */
#define TMRB_PWM_HOLD                       (2U)    /*!< TIM_<t>_PWM1(t=1~8) output hold level */
#define TMRB_PWM_INVT                       (3U)    /*!< TIM_<t>_PWM1(t=1~8) output inverted level */
/**
 * @}
 */

/**
 * @defgroup TMRB_PWM_Force_Output_Polarity TMRB Output Compare Force Output Polarity
 * @{
 */
#define TMRB_PWM_FORCE_INVD                 (0x0000U)           /*!< Invalid */
#define TMRB_PWM_FORCE_LOW                  (TMRB_PCONR_FORC_1) /*!< Force TIM_<t>_PWM1(t=1~8) output low level */
#define TMRB_PWM_FORCE_HIGH                 (TMRB_PCONR_FORC)   /*!< Force TIM_<t>_PWM1(t=1~8) force output high level */
/**
 * @}
 */

/**
 * @}
 */

/*******************************************************************************
 * Global variable definitions ('extern')
 ******************************************************************************/

/*******************************************************************************
  Global function prototypes (definition in C source)
 ******************************************************************************/
/**
 * @addtogroup TMRB_Global_Functions
 * @{
 */
en_result_t TMRB_Init(CM_TMRB_TypeDef *TMRBx,
                        const stc_tmrb_init_t *pstcTmrbInit);
en_result_t TMRB_StructInit(stc_tmrb_init_t *pstcTmrbInit);
void TMRB_DeInit(CM_TMRB_TypeDef *TMRBx);
uint16_t TMRB_GetCountValue(const CM_TMRB_TypeDef *TMRBx);
void TMRB_SetCountValue(CM_TMRB_TypeDef *TMRBx, uint16_t u16Value);
uint16_t TMRB_GetPeriodValue(const CM_TMRB_TypeDef *TMRBx);
void TMRB_SetPeriodValue(CM_TMRB_TypeDef *TMRBx, uint16_t u16Value);
uint16_t TMRB_GetCompareValue(const CM_TMRB_TypeDef *TMRBx);
void TMRB_SetCompareValue(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Value);
void TMRB_Start(CM_TMRB_TypeDef *TMRBx);
void TMRB_Stop(CM_TMRB_TypeDef *TMRBx);
void TMRB_SyncStartCmd(CM_TMRB_TypeDef *TMRBx,
                        en_functional_state_t enNewState);
en_flag_status_t TMRB_GetStatus(const CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Flag);
void TMRB_ClearStatus(CM_TMRB_TypeDef *TMRBx, uint16_t u16Flag);
void TMRB_SetClockDiv(CM_TMRB_TypeDef *TMRBx, uint16_t u16Div);
void TMRB_SetCountDir(CM_TMRB_TypeDef *TMRBx, uint16_t u16Dir);
uint16_t TMRB_GetCountDir(const CM_TMRB_TypeDef *TMRBx);
void TMRB_SetCountMode(CM_TMRB_TypeDef *TMRBx, uint16_t u16Mode);
void TMRB_IntCmd(CM_TMRB_TypeDef *TMRBx,
                    uint16_t u16IntType,
                    en_functional_state_t enNewState);
void TMRB_EventCmd(CM_TMRB_TypeDef *TMRBx,
                        en_functional_state_t enNewState);
void TMRB_SetFunc(CM_TMRB_TypeDef *TMRBx, uint16_t u16Func);
void TMRB_ReloadCmd(CM_TMRB_TypeDef *TMRBx,
                        en_functional_state_t enNewState);
void TMRB_HWStartCondCmd(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Cond,
                                en_functional_state_t enNewState);
void TMRB_HWStopCondCmd(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Cond,
                                en_functional_state_t enNewState);
void TMRB_HWClearCondCmd(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Cond,
                                en_functional_state_t enNewState);
void TMRB_HWCountUpCondCmd(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Cond,
                                en_functional_state_t enNewState);
void TMRB_HWCountDownCondCmd(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Cond,
                                en_functional_state_t enNewState);
void TMRB_HWCaptureCondCmd(CM_TMRB_TypeDef *TMRBx,
                                uint16_t u16Cond,
                                en_functional_state_t enNewState);
void TMRB_FilterCmd(CM_TMRB_TypeDef *TMRBx,
                    en_functional_state_t enNewState);
void TMRB_SetFilterClockDiv(CM_TMRB_TypeDef *TMRBx,
                                    uint16_t u16Div);
void TMRB_SetTriggerSrc(en_event_src_t enEventSrc);

/**
 * @addtogroup TMRB_PWM_Global_Functions
 * @{
 */
en_result_t TMRB_PWM_Init(CM_TMRB_TypeDef *TMRBx,
                            const stc_tmrb_pwm_init_t *pstcPwmInit);
en_result_t TMRB_PWM_StructInit(stc_tmrb_pwm_init_t *pstcPwmInit);
void TMRB_PWM_DeInit(CM_TMRB_TypeDef *TMRBx);
void TMRB_PWM_Cmd(CM_TMRB_TypeDef *TMRBx,
                        en_functional_state_t enNewState);
void TMRB_PWM_SetPolarity(CM_TMRB_TypeDef *TMRBx,
                          uint16_t u16CountState,
                          uint16_t u16Polarity);
void TMRB_PWM_SetForcePolarity(CM_TMRB_TypeDef *TMRBx,
                          uint16_t u16Polarity);
/**
 * @}
 */

/**
 * @}
 */

#endif /* DDL_TMRB_ENABLE */

/**
 * @}
 */

/**
 * @}
 */

#ifdef __cplusplus
}
#endif

#endif /* __HC32F160_TMRB_H__ */

/*******************************************************************************
 * EOF (not truncated)
 ******************************************************************************/
